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[Windows Develop有译zhup

Description: 交通灯控制电路 一、 设计任务与要求 1.设计一个十字路口的交通灯控制电路,要求甲车道和乙车道两条交叉道路上的车辆交替 运行,每次通行时间都设为25秒; 2.要求黄灯先亮5秒,才能变换运行车道; 3.黄灯亮时,要求每秒钟闪亮一次 。 二、实验预习要求 1.复习数字系统设计基础。 2.复习多路数据选择器、二进制同步计数器的工作原理。 3.根据交通灯控制系统框图,画出完整的电路图。-a control circuit design tasks and requirements 1. Design a crossroads of traffic lights control circuit, and requested a B lane cross-road of two lanes of traffic on the turn of operation, each time prevailing Set 25 seconds; 2. Asked yellow first-five seconds, can transform running lanes; 3. Bright yellow light, flashing a request per second. Two experimental rehearsal requirements 1. Review of digital systems design basis. 2. Review of Multiple Choice of data, binary synchronous counter to the principle. 3. According to the traffic light control system block diagram to depict the integrity of the circuit.
Platform: | Size: 1024 | Author: 刘鹏 | Hits:

[VHDL-FPGA-VerilogVerilogHDL_trafficlight

Description: 采用Verilog HDL语言编写的交通灯控制系统,这是一个完整的毕设课题,分别有分频、显示译码、倒计时和动态显示驱动模块,实用价值很高,-Using Verilog HDL language of the traffic lights control system, which is a complete set of BI subjects who were frequent, indicating decoding, countdown and dynamic display driver module, a very high practical value,
Platform: | Size: 363520 | Author: 廖耿耿 | Hits:

[VHDL-FPGA-Verilogtraffic

Description: 一个很好的交通灯控制的Verilog HDL实现方式,包括LED显示部分。-A good control of traffic lights to achieve the Verilog HDL, including the LED display.
Platform: | Size: 1024 | Author: keke | Hits:

[Othertraffic

Description: 实现路口交通灯系统的控制方法很多,可以用标准逻辑器件,可编程控制器PLC,单片机等方案来实现。但是这些控制方法的功能修改及调试都需要硬件电路的支持,在一定程度上增加了功能修改及系统调试的困难。因此,在设计中采用EDA技术,应用目前广泛应用的Verilog HDL硬件电路描述语言,实现交通灯系统控制器的设计,利用MAX+PLUS 集成开发环境进行综合、仿真,并下载到CPLD可编程逻辑器件中,完成系统的控制作用。-Intersection traffic signal systems to achieve the control of many ways you can use standard logic devices, programmable logic controller PLC, microcontroller and other programs to achieve. However, the functions of these control methods require modification and debugging support for hardware circuit, to a certain extent, an increase of functional modifications and system debugging difficulties. Thus, in the design using EDA technologies, applications, the widely used Verilog HDL hardware circuit description language to realize the design of traffic signal system controller, using MAX+ PLUS a comprehensive integrated development environment, simulation, and downloaded to the CPLD programmable logic devices to complete the system control role.
Platform: | Size: 1024 | Author: 沈田 | Hits:

[VHDL-FPGA-Verilogtraffic_light

Description: 用Verilog HDL语言写一个交通控制灯的状态机。十字路口,红绿灯,带倒计时功能,也可以自行变换亮灯时间。-Verilog HDL language used to write a traffic control light state machine. Intersections, traffic lights, with the countdown function, you can also change their own light time.
Platform: | Size: 1465344 | Author: sunying | Hits:

[VHDL-FPGA-Verilogtraffic-light

Description: 本代码是用verilog HDL编写,实现的是十字路口交通灯的控制-The code is written using verilog HDL, to achieve the control of traffic lights crossroads
Platform: | Size: 250880 | Author: 西蟀 | Hits:

[Software Engineeringverilog-traffic-light

Description: 基于VerilogHDL设计的交通灯控制系统本设计利用Verilog HDL 语言、采用层次化混合输入方式,可控制4个路口的红、黄、绿、左转四盏信号灯,让其按特定的规律进行变化。 -This design using Verilog HDL language, adopt hierarchical mixed input method, four intersection control of red, yellow, green, left four lamp lights, let its according to specific rule changes.
Platform: | Size: 98304 | Author: 镶牙另 | Hits:

[VHDL-FPGA-VerilogVerilog-HDL

Description: 包括交通灯控制等的Verilog HDL源程序 不是自己编的 是一本书里带的例程 很不错-Including Traffic Lights Control code, very impressive,enjoy sharing with you
Platform: | Size: 13458432 | Author: Alice | Hits:

[VHDL-FPGA-Veriloghonglvdeng

Description: Verilog HDL作为一种规范的硬件描述语言,被广泛应用于电路的设计中。他的设计描述可被不同的工具所支持,可用不同器件来实现。利用Verilog HDL语言自顶向下的设计方法设计交通灯控制系统,使其实现道路交通的正常运转,突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点,并通过Xilinx ISE6.02和ModelSim5.6完成综合、仿真。此程序通过下载到FPGA芯片后,可应用于实际的交通灯控制系统中。-Verilog HDL as a standard hardware description language, is widely used in circuit design. Description of his design can be supported by different tools, different devices can be used to achieve. Using Verilog HDL language top-down design approach traffic light control system to achieve the normal operation of road transport, highlighting its good as a hardware description language, readability, portability and ease of understanding, etc., and completed by Xilinx ISE6.02 and ModelSim5.6 synthesis, simulation. Through this program downloaded to the FPGA chip, can be applied to the actual traffic light control system.
Platform: | Size: 1024 | Author: zhaomin | Hits:

[VHDL-FPGA-Verilogtraffic-light

Description: 实现双向交通灯控制的Verilog HDL代码-Verilog HDL code to control bi-direction traffic light
Platform: | Size: 1024 | Author: 吴原远 | Hits:

[Otherverilog

Description: verilog hdl 交通灯控制实验 源代码为y4.v-verilog hdl traffic light control experiment source code y4.v
Platform: | Size: 280576 | Author: 孤独游戏 | Hits:

[Othertraffic_yangyang_20104878

Description: 交通灯控制系统,基于Verilog HDL-Traffic light control system, based on Verilog HDL
Platform: | Size: 1024 | Author: yang | Hits:

[VHDL-FPGA-Verilogvdemo_p107_traligt_2015-07-06

Description: 自己写的教科书中的例子,《verilog hdl数字设计与综合(第二版)》107页,交通灯的例子。主干路与乡村路交通灯控制。verilog源码,modelsim仿真通过。--verilog, modelsim, traffic light control
Platform: | Size: 1093632 | Author: chiahmk | Hits:

[VHDL-FPGA-Verilogjiaotongdeng_fuza

Description: 本文基于FPGA技术的发展和Quartus II开发平台,实现路口交通灯控制器是一种解决方案。使用Verilog HDL硬件描述语言来描述语言程序的分频器模块,控制模块,数据解析模块,显示译码模块和段选位选模块,五个模块,并通过各个模块程序之间的端口合理连接和协调,成功设计出交通信号灯控制电路。在Quartus II环境下模拟,生成顶层文件下载后,在FPGA EP2C5Q208器件进行验证。(Based on the development of FPGA technology and the development platform of Quartus II, the realization of traffic lights controller at intersection is a solution. The Verilog HDL hardware description language is used to describe the frequency divider module of the language program, the control module, the data parsing module, the decoding module and the segment selection and selection module, five modules, and the communication and communication light control circuit is successfully designed through the reasonable connection and coordination of the ports between each module program. In the Quartus II environment, the simulation generates top-level files after downloading in FPGA The EP2C5Q208 device is verified.)
Platform: | Size: 5611520 | Author: 威威谈谈 | Hits:

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